In the past, in a solid-state imaging device provided with a detecting element for detecting the intensity (luminance) of irradiation light such as reflected light from a shooting subject as a physical input, there has been provided a light receiving section having a corresponding number of detecting elements (pixels) to the size of a screen arranged in a matrix. As one of the detecting elements constituting such pixels, there has been known a threshold voltage modulation image sensor (VMIS: Vth Modulation Image Sensor). The VMIS is for converting the charge corresponding to an amount of light into a voltage and reading it using a substrate modulation effect of a MOS transistor. To put it concretely, threshold voltage used when switching the operation of the MOS transistor from OFF to ON is changed in accordance with the charge caused by light reception, and the change in the threshold voltage is output as a pixel signal. On this occasion, a bias voltage is applied to a gate electrode and a drain electrode in the MOS transistor, and the pixel signal is read out from the source electrode as a follower circuit.
More specifically, the pixel in the solid-state imaging device is composed of an insulated gate MOS transistor for detecting an image signal and a photodiode. In particular in the case of the pixel of the VMIS, the cathode of the photodiode is connected to the drain electrode, and the anode side thereof is connected to the back gate electrode on the substrate. The MOS transistor part of this area has a high-density buried layer for accumulating light-generated charge generated by light irradiation in the photodiode provided in the well region adjacent to the source region and under the gate electrode. In other words, the threshold voltage is modulated by accumulating the light-generated charge in the high-density buried layer, thereby detecting the pixel signal. As the whole pixels, predetermined numbers of pixels are respectively provided in row and column directions in a matrix manner to thereby form a light receiving section.
In the light receiving section, the gate electrodes of a plurality of pixels constituting each row are commonly connected to each other to form a gate line. Further, it is arranged that in a detection period of the pixel signal, a vertical scanning circuit, which outputs a scanning signal for setting the gate electrode of the MOS transistor to an active state for each row, controls the voltage sequentially applied to the gate lines, thereby reading out the pixel signals. Further, drain lines each formed by commonly connecting the drain electrodes of the MOS transistors and the cathodes of the photodiodes in the pixels of each row are commonly connected to each other on the whole pixels from an electrical point of view. Further, it is arranged that a drive circuit controls a drive voltage applied to the drain line to thereby perform accumulation of the light signal and reading out of the pixel signals.
The source line formed by commonly connecting the source electrodes of the MOS transistors in the pixels of each of the columns is connected to one end of a first line memory composed of a plurality of capacitive elements each accumulating and holding the charge corresponding to the output voltage from the pixel to which the scanning signal is input, and one end of a second line memory composed of a plurality of capacitive elements each accumulating and holding the charge corresponding to the output voltage from the pixel immediately after resetting the stored charge of the pixel. Then, when resetting the pixels, a reset circuit applies a reset voltage to the pixels to perform reset (discharge of the stored charge). Further, under the control of the vertical scanning circuit, the pixel signal immediately after the reset is transmitted to the second line memory. Further, when reading out the pixel signal, the pixel signal is transmitted to the first line memory under the control of the vertical scanning circuit. Incidentally, in this case, the other end side of each of the capacitive elements is connected to the ground.
It should be noted that well-known technologies related to such a solid-state imaging device (a solid-state imaging element) and the pixel configuration used therefor are disclosed in, for example, Patent Document 1 and Patent Document 2.